A DMOS (Double diffused MOS) transistor is a type of MOSFET (Metal Oxide Semiconductor Field Effect Transistor) that uses two sequential diffusion steps aligned to the same edge to form the channel region of the transistor. DMOS transistors are often high voltage, high current devices, used either as discrete transistors or as components in power integrated circuits. DMOS transistors can provide high current per unit area with a low forward voltage drop.
A typical discrete DMOS transistor structure includes two or more individual DMOS transistor cells which are fabricated in parallel. The individual DMOS transistor cells share a common drain contact (the substrate), while their sources are all shorted together with metal and their gates are shorted together by polysilicon. Thus, even though the discrete DMOS circuit is constructed from a matrix of smaller transistors, it behaves as if it were a single large transistor. For a discrete DMOS circuit it is desirable to maximize the conductivity per unit area when the transistor matrix is turned on by the gate.
One particular type of DMOS transistor is a so-called trench DMOS transistor in which the channel is present on the sidewall of a trench, with the gate formed in the trench, which extends from the source towards the drain. The trench, which is lined with a thin oxide layer and filled with polysilicon, allows less constricted current flow than the vertical DMOS transistor structure and thereby provides lower values of specific on-resistance. Examples of trench DMOS transistors are disclosed in U.S. Pat. Nos. 5,072,266, 5,541,425, and 5,866,931.
One example is the low voltage prior art trench DMOS transistor shown in the cross-sectional view of FIG. 1. As shown in FIG. 1, trench DMOS transistor 10 includes heavily doped substrate 11, upon which is formed an epitaxial layer 12, which is more lightly doped than substrate 11. Metallic layer 13 is formed on the bottom of substrate 11, allowing an electrical contact 14 to be made to substrate 11. As is known to those of ordinary skill in the art, DMOS transistors also include source regions 16a, 16b, 16c, and 16d, and body regions 15a and 15b. Epitaxial region 12 serves as the drain. In the example shown in FIG. 1, substrate 11 is relatively highly doped with N-type dopants, epitaxial layer 12 is relatively lightly doped with N type dopants, source regions 16a, 16b, 16c, and 16d are relatively highly-doped with N type dopants, and body regions 15a and 15b are relatively highly doped with P type dopants. A doped polycrystalline silicon gate electrode 18 is formed within a trench, and is electrically insulated from other regions by gate dielectric layer 17 formed on the bottom and sides of the trench containing gate electrode 18. The trench may extend into the heavily doped substrate 11 to reduce any resistance caused by the flow of carriers through the lightly doped epitaxial layer 12, but this structure also limits the drain-to-source breakdown voltage of the transistor. A drain electrode 14 is connected to the back surface of the substrate 11, a source electrode 22 is connected to the source regions 16 and the body regions 15 by source/body metal layer 23, and a gate electrode 19 is connected to the polysilicon 18 that fills the trench forming the gate.
Another example of a trench DMOS device is disclosed in U.S. Pat. No. 4,893,160 and shown in the cross-sectional view of FIG. 2. As shown in FIG. 2, partially completed trench DMOS device 30 includes substrate 11, epitaxial region 12, body regions 15a and 15b, and source regions 16a, 16b, 16c, and 16d. However, in comparison to the device shown in FIG. 1, N+ region 39 is added along the lower sides and bottom of trench 36, or alternatively just along the bottom of trench 36. At this step in the fabrication process, a layer of oxide 35 is present on the silicon surface. This structure improves the device performance by allowing carriers to flow through a heavily doped region at the bottom of the trench, thereby reducing the local resistance.
It would be desirable to provide further improvements to trench DMOS devices. For example, there is a need for a trench DMOS device that provides a low on-resistance and which is relatively simple and inexpensive to fabricate.